4 Feb 14:48Norbo
*Python Hardware Processor
4 Feb 21:46Christopher Lozinski
**Python Hardware Processor
4 Feb 23:11Christopher Felton
**Python Hardware Processor
5 Feb 18:17garyr
***Python Hardware Processor
6 Feb 11:44Norbo
***Python Hardware Processor
6 Feb 13:27Christopher Felton
****Python Hardware Processor
6 Feb 16:56Christopher Lozinski
*****Python Hardware Processor
1 Feb 10:06Tim Brooks
*can MyHDL help?
1 Feb 11:07Sébastien Bourdeauducq
**can MyHDL help?
1 Feb 13:41Tim Brooks
***can MyHDL help?
1 Feb 13:38Sébastien Bourdeauducq
****can MyHDL help?
1 Feb 15:31Christopher Felton
****can MyHDL help?
19 Jan 12:51Wesley New
*New way of specifying user defined code, not working inside class
19 Jan 13:23Christopher Felton
**New way of specifying user defined code, not working inside class
19 Jan 14:35Sébastien Bourdeauducq
***New way of specifying user defined code, not working inside class
24 Jan 12:54Wesley New
****New way of specifying user defined code, not working inside class
18 Jan 13:35Matti
*Calling regular python code during simulation
19 Jan 11:14Christopher Felton
**Calling regular python code during simulation
12 Jan 13:06Wesley New
*List of signals unsupported in top-level
12 Jan 14:51Christopher Felton
**List of signals unsupported in top-level
12 Jan 15:01Wesley New
***List of signals unsupported in top-level
23 Dec 13:37Oscar Diaz
*Restrictions for conversion
23 Dec 14:55Christopher Felton
**Restrictions for conversion
22 Dec 14:07David Kitchen
*Strange behaviour in traceSignals()
22 Dec 21:17Oscar Diaz
**Strange behaviour in traceSignals()
20 Dec 12:35Oscar Diaz
*yield before the end of a simulation
20 Dec 14:16Christopher Felton
**yield before the end of a simulation
20 Dec 14:55Oscar Diaz
***yield before the end of a simulation
23 Dec 15:48Christopher Felton
****yield before the end of a simulation
26 Dec 20:31Uri Nix
*****yield before the end of a simulation
27 Dec 14:20Christopher Felton
*****yield before the end of a simulation
20 Dec 11:17Sébastien Bourdeauducq
*[DRAFT/RFC] Migen, a Python toolbox for building complex digital hardw
15 Dec 03:24Tom Fitz
*bidirectional bus -tristate help
15 Dec 13:35Christopher Felton
**bidirectional bus -tristate help
15 Dec 22:28Tom Fitz
***bidirectional bus -tristate help
15 Dec 23:23Norbo
**bidirectional bus -tristate help
16 Dec 01:02Tom Fitz
***bidirectional bus -tristate help
13 Dec 17:59Norbo
*A continuous sinus waveform generator (alla Pafnuty Chebyshev)
23 Nov 01:29garyr
*Signal has multiple drivers
23 Nov 18:09Christopher Felton
**Signal has multiple drivers
23 Nov 21:22garyr
***Signal has multiple drivers
19 Nov 23:22Norbo
*Conversion error to vhdl
20 Nov 15:37Christopher Felton
**Conversion error to vhdl
20 Nov 17:13Norbo
***Conversion error to vhdl
21 Nov 15:52Oscar Diaz
**Conversion error to vhdl
21 Nov 17:28Christopher Felton
***Conversion error to vhdl
22 Nov 22:15Norbo
****Conversion error to vhdl
23 Nov 17:13Christopher Felton
*****Conversion error to vhdl
30 Nov 12:48Norbo
******Conversion error to vhdl
30 Nov 13:39Christopher Felton
*******Conversion error to vhdl
30 Nov 16:52Norbo
********Conversion error to vhdl
3 Dec 19:39Christopher Felton
*********Conversion error to vhdl
6 Dec 15:12Norbo
**********Conversion error to vhdl
8 Dec 13:19Christopher Felton
***********Conversion error to vhdl
12 Dec 20:40Norbo
**strange behavior on some sample code
12 Dec 20:54Norbo
***strange behavior on some sample code
13 Dec 14:25Christopher Felton
***strange behavior on some sample code
14 Dec 20:09Norbo
****strange behavior on some sample code
19 Nov 19:57garyr
*Third-party modules?
20 Nov 00:00Christopher Felton
**Third-party modules?
20 Nov 03:41garyr
***Third-party modules?
20 Nov 05:50Christopher Felton
****Third-party modules?
20 Nov 18:43garyr
*****Third-party modules?
21 Nov 08:22Wesley New
******Third-party modules?
21 Nov 20:33Christopher Felton
******Third-party modules?
15 Nov 05:32Christopher Felton
*MEP : Signal Containers
21 Nov 16:39Oscar Diaz
**MEP : Signal Containers
21 Nov 16:53Oscar Diaz
***MEP : Signal Containers
21 Nov 17:55Christopher Felton
***MEP : Signal Containers
21 Nov 18:29Oscar Diaz
****MEP : Signal Containers
9 Nov 13:36Oscar Diaz
*State machine modeling
9 Nov 15:55Christopher Felton
**State machine modeling
9 Nov 16:29Oscar Diaz
***State machine modeling
9 Nov 16:54Christopher Felton
****State machine modeling
7 Nov 07:30Christopher Felton
*Pythonic Test frameworks
7 Nov 22:50Uri Nix
**Pythonic Test frameworks
7 Nov 23:15Christopher Felton
***Pythonic Test frameworks
8 Nov 02:21Bob Cunningham
****Pythonic Test frameworks
8 Nov 05:07Christopher Felton
*****Pythonic Test frameworks
9 Nov 02:04Bob Cunningham
******Pythonic Test frameworks
9 Nov 04:01Christopher Felton
*******Pythonic Test frameworks
9 Nov 04:14Christopher Felton
********Pythonic Test frameworks
9 Nov 22:41Uri Nix
*********Pythonic Test frameworks
21 Oct 20:41David Greenberg
*Problems with MyHDL and Modelsim cosimulation
22 Oct 00:04Christopher Felton
**Problems with MyHDL and Modelsim cosimulation
21 Oct 12:29Jan Decaluwe
*Notice
21 Oct 23:49Christopher Felton
**Notice
23 Oct 06:47Martín Gaitán
**Notice
23 Oct 12:27Jose Ignacio Villar
***Notice
14 Oct 17:25Martín Gaitán
*CHIP, a myhdl like project
17 Oct 09:51Jan Decaluwe
**CHIP, a myhdl like project
17 Oct 10:38Sébastien Bourdeauducq
***CHIP, a myhdl like project
17 Oct 15:07Christopher Felton
****CHIP, a myhdl like project
17 Oct 18:40Sébastien Bourdeauducq
*****CHIP, a myhdl like project
17 Oct 20:32Christopher Felton
******CHIP, a myhdl like project
17 Oct 23:27Jan Decaluwe
****CHIP, a myhdl like project
13 Oct 22:58garyr
*OT - Atmel ProChip Designer software
14 Oct 09:39Jan Decaluwe
**OT - Atmel ProChip Designer software
14 Oct 15:25garyr
***OT - Atmel ProChip Designer software
10 Oct 18:22Christopher Felton
*toVHDL Observation